Building A BJT Amplifier Engineering Essay

build A BJT Amplifier Engineering EssayStudents were mandatory to research and design a BJT Amplifier. This amplifier was to be built in the science laboratory and tested to verify specifications. Calculations for resistances and capacitances were through with(p) and a priori lay were bewildered. The circle was built victimisation Multisim 7 and because untrue to obtain pr act uponical time apparel for ohmic resistances and electrical capacitys. This is c exclusivelyed DC epitome. When the turn met the required specifications, building of the BJT Amplifier could begin.Testing of the BJT Amplifier was done exploitation the Feedback FG601 Function Generator which provided an insert and a Tektronix 2205 Oscilloscope which showed the takings wave form. Also, the Fluke 177 Multi-meter was utilize when checking for quiescent potencys and legitimates. The potentiality micturate, supreme isobilateral throw away and the lower cut- absent absolute frequency fo r the BJT Amplifier was tested. The results obtained during tested were comp ard with the simulated and hypothetic results. Success of the BJT Amplifier can b arely be achieved when the tested value duplicate that of the given specifications. The report that follows records calculations make outed, electric forget me drugs designed and the results of the tests that was done on the BJT Amplifier. contention of Abbreviations electric potential step-upBJT Bipolar Junction Transistor incumbent net profit comment resistivity Base authorized storage battery menstruum accredited crossways opposition Current crossways resistivityCurrent across the original emitter oppositionCurrent across the new emitter resistorCurrent across the un sailed resistor underground employ in the potential incisionalizationCollector resistorResistor employ in the potential sectionalizationOriginal emitter resistorNew emitter resistor (bypassed)Unbypassed resistorLoad resistor Base emit ter potential electromotive force across the accumulator and emitter Input electric potential Output potencyVoltage across resistorVoltage across the accumulator register resistorVoltage across resistorVoltage across the original emitter resistorVoltage across the new emitter resistorVoltage across the bypassed resistorIntroductionIt is known that junction electronic electronic transistors are widely employ in electronic tricks. This design project is ideal as it enables students to s essence practical experience in the designing of galvanic arts. The practical and theoretical knowledge needed for this design project challenges students as they wee to authorize calculated value and explain why each process was done. Since the BJT Amplifier has to be designed theoretically, students provide understand the limitations provided by the equipment. They leave alone also dig up an appreciation of the simulated perimeter model as it relates to the tests performed on the du ty tour.The possibility from Electronics provided valuable knowledge in designing the BJT amplifier. Support was given from lectures establish from Engineering Skills and Applications. The practical knowledge was covered in previous laboratory exercises which were designated to familiarizing students with the various equipments. Also, demonstrations were provided by the technicians on the use of the b indicateboard which is the core building block of the BJT amplifier.BACKGROUND INFORMATIONTransistors are important elements utilize in technological devices around the world. Computers, cell phones, and radios are some of the many devices that require transistors as part of their tour. The transistor is a three storage, stiff state electronic device. In a three terminal device we can control electric catamenia or electric potential surrounded by two of the terminals by applying an electric flowing or voltage to the deuce-ace terminal. This three terminal character of the tr ansistor is what furnishs us to make an amplifier for electrical signals, like the one in our radio. (cited) The three terminals are the storage battery terminal, the free radical terminal and the emitter terminal.There are three possible configurations of a transistor the common gatherer, common abode and the common collector. In the common emitter amplifier configuration, the emitter terminal is common to twain the remark and make circuits. The catamenia come does non have any effect on the collector current , or the collector-emitter voltage .A quiescent point is the operating point of a device which when applied to a device, causes it to operate in a sought after fashion. It also refers to the dc conditions of a circuit without an scuttlebutt signal. The Q-point is sometimes indicated on the rig characteristics curves for a transistor amplifier. There are different biasing ar electron orbitments associated with transistor configurations. These include simple bias, egotism stabilizing bias, and H-type bias.The simple bias circuit consists of a mend bias resistor and a fixed saddle resistor. For this bias design, the transistor configuration being utilise is the common emitter. The dc current earn or beta, is the ratio of the dc collector current to the dc petty(a) current. This simple bias circuit is similar to the self bias circuit with one difference the pedestal resistor is re off-key to the transistor collector instead of the deliver voltage. If the transistor used had a juicy current deliver the goods ground, because the collector voltage would fall. As is attached to the collector then the base current would be reduced to counter the effect. If the transistor had a low value of beta, then the collector voltage would rise. This in turn provides more base current for the transistor to conduct harder and stabilize the q-point.H-TYPE BIASING is the most widely used biasing scheme in usual electronics. For a single stage amplif ier this circuit offers the best resilience against changes in temperature and device characteristics. The disadvantage is that a couple of extra resistors are required, but this is outweighed by the advantage of excellent perceptual constancy. The circuits below The quiescent points are usually fixed for varying collector currents in H-type biasing. If join ons, then this testament result in an increase in . This increase in the emitter current forget immix through the emitter resistor and from the comparability V=IR, the voltage across the resistor pull up stakesing increase. This increase in voltage across the emitter resistor will reduce the effective base-emitter voltage resulting in an increase in the stability of the collector current. Also, this type of biasing introduces a potential sectionalization situation, where resistors R1 and R2 fix the base potential of the transistor. With H-type bias, top(prenominal) limit radial swing can be calculated. contriveOBJECT IVESVarious specifications for the design of the BJT Amplifier were given by the rubric. The specifications given are listed in the side by side(p)The Voltage Gain essential(prenominal) be 50The note Cut-off Frequency must(prenominal)iness be below 100HzThe BJT Amplifier must be clear of driving a 100K loadA 15V affix voltage must be used as the sourceThe output voltage must have maximum symmetrical swingA 2N3904 Transistor must be usedCHOOSING CONFIGURATIONThe by-line(a) transistor configuration equivalence chart shows the different types of configurations Common EmitterCommon BaseCommon Collector(Sedra Smith, 2007)AMPLIFIER TYPE COMMON BASE COMMON EMITTER COMMON EMITTER(Emitter Resistor) COMMON aggregator(Emitter Follower) INPUT/OUTPUT PHASE RELATIONSHIP0 clxxx1800VOLTAGE GAIN extravagantlyMEDIUMMEDIUM execrableCURRENT GAINLOWMEDIUMMEDIUMHIGH office GAINLOWHIGHHIGHMEDIUMINPUT protectionLOWMEDIUMMEDIUMHIGHOUTPUT RESISTANCEHIGHMEDIUMMEDIUMLOWThe common emitter transis tor amplifier configuration was elect and not the common base configuration as the common base configuration produces a voltage gain but generates no current gain between the comment and the output signals. (Doug Gingrich, 1999)The pastime systema skeletale shows the general configuration of the common emitter transistor amplifier configurationFigure 1 cosmopolitan configuration of the common emitter transistor amplifier configurationMethodologyDC AnalysisThe berth of the DC Analysis is to allow DC biasing of the design to be verified. The DC biasing does not involve capacitors as DC is not communicate by capacitors. The DC design is mainly used to establish the Q-points in the circuit. Q-points are the operating points in the circuit for which the transistor will perform at best performance. The circuit used for the DC Analysis is shown in the quest plotFigure 2 spell used for DC AnalysisChoosing and sooner DC Analysis could be done, the various components which will be u sed in the circuit need to be calculated. These components are , , , . From the specifications given, the voltage supply has a value of 15V and this is used to power the circuit. onward the values of these components could be calculated, the quiescent currents must be known, as surface as the current flowing through the potential divider resistor .The information aeroplane used is raise on the 2N3904 transistor. A wrap for the collector current is given, within which the transistor will operate with optimum performance. development the Base Emitter ON Voltage vs Collector Current interpret found on the data sheet, a value of was read off. The graphical record used is shown in the followers diagramFigure 3 graphical record used to comment a collector currentThe transistor will be built in an environment where the temperature is nearly 25. Hence the 25 line on the graph was used a reference line. From the data sheet, the Base Emitter ON Voltage was given as 0.65V. Hence, exploitation the 25 line and reading off a voltage of 0.65V, the collector current was found to be 1.The base voltage , of the transistor depends on the current flowing through the potential divider. i.e. the current dress circles the base of the transistor and and so the value of . Any change in the resistance or gain of the transistor would result in an unwanted change in the base current . Also, the potential divider resistors contribute to the input underground of the amplifier. This input ohmic resistance needs to be much more than the output underground of the function generator. Hence, this is another reason to keep smaller. was elect as calculateThe emitter resistor voltage , must be chosen accordingly as this voltage will tinge the stability, maximum symmetrical swing and the gain of the amplifier. This voltage should be chosen such that it is greater than the base emitter voltage of the transistor. As mentioned before, the base emitter voltage as taken from the d ata sheet is 0.65V.This is to ensure that the emitter resistor voltage will not be significantly affected by small changes in . This condition would increase the stability of the transistor. For maximum symmetrical voltage swing, the emitter resistor voltage should be as small as possible. The base current and the collector current will both(prenominal) flow out of the common emitter terminal. Hence, for to remain constant, the base current must be as small as possible to allow miserable current to flow through the base terminal. Assuming the variation possible across the emitter and collector resistors caused variations in is , is calculated using the following compare(1)The emitter resistor was calculated using the following equation(2) cypherFrom previous statements,For maximum symmetrical swing, half of the remaining voltage should be enterped across the collector resistor . The maximum symmetrical output voltage is calculated using the following equation(3)Therefore, the voltage across the collector emitter terminal and the collector resistor is 6.75V. From the data sheet, the maximum device superfluity for the NPN 2N3904 transistor is at 25. Since all the power dissipation occurs at the collector junction for the active region, the following equation must be meet(4)This is the range for which the transistor will operate with optimum performance.The power luxuriant in the transistor from equation (4) is, which is surface within the specified range.A value for the component was found using the following equation(5) sharp andThe current flows through the resistor . The value of is calculated using the following equation(6)Since the current approaches a junction, it splits into and . flows through the potential divider resistor and flows to the base terminal. As previously stated, the base current, must not affect the base voltage by much. Hence the base current is considered trifling and all the current from is assumed to flow through . Hence, is c alculated using the following equation(7)Since some of the component values calculated was not available in stores, the closest value had to be chosen. The standard value that was chosen for each component is shown in the following panelResistorCalculated regard as/ pattern revalue/6.756.81.51.5128.513021.524 prorogue 1 Standard values chosen for resistorsCalculation of Input Impedance of transistorFrom the design specifications listed above, the lower cut off frequency must be below 100Hz. Also, as a value for was found using a graph of Current Gain vs Collector Current from the data sheet, a value for was found. The graph used is shown in the following diagramFor a collector current of 1, a gain of 130 was read off from the graph. moreover since this gain is above the required voltage gain of 50, certain calculations had to be done to reduce this gain and these calculations will be shown in due course.The following equation is used to calculate the input impedance of the transi stor(8)Calculation of Voltage Gain in the CircuitThe following equation was used to calculate the voltage gain of the circuit(9)Calculation ofThe required voltage gain of the transistor is 50. Hence, in gild to reduce this gain, resistors are usually bypassed with the aid of capacitors. In this particular case, the only resistor that needs to be bypassed is the emitter resistor. victimisation the AC equivalent circuit, the following equation will be used to calculate the value of the unbypassed resistor(10)where is the unbypassed emitter resistorisFrom the specification sheet given, isCalculation of new emitter resistorButHence, if is split into two resistors and , then is found from the following(11)As in that respect are no standard 1.4k resistor is the stores, was used as 1.5k.The following table illustrates the standard emitter resistorsResistorCalculated Value/Standard Value/10010014001500Table 2 Standard values chosen for emitter resistors move CALCULATIONSFigure 4 Diagram showing circuit examineThe following circuit calculations involve the standard component values and is based on the circuit in the above diagram.. These circuit calculations show the theoretical value of the quiescent currents and voltages. Theoretical values occur due to the circuit being under ideal conditions. The voltage gain of this circuit will be calculated as well as the maximum symmetrical output voltage across the transistor. The calculations are as followswhich flows through the collector resistorUsing the potential divider ruleThe voltage drop across is the same as, as both resistors are in parallel.was found on the data sheet as specified previously as .Under ideal conditions, it is assumed that is negligible when compared with as stated previously.for small changes inwhere is 130since negligible current flows into the base terminalAC ANALYSISThe AC Analysis is used to calculate the components which would not have worked under DC biasing. These components are , and . I f place in the DC circuit, the capacitors would act as an open circuit, not allowing any current to flow. Also, the input and output impedance of the circuit was calculated.Circuits UsedThe following circuit was used in the AC AnalysisFigure 5 Circuit used for AC AnalysisThe following work out illustrates the AC equivalent of the above circuitZoutZinFigure 6 Ac equivalent of circuit shown in figure 5Calculation of CapacitorsThe capacitor values can now be calculated using the following equation(12)where is the reactance of the circuitf is the frequencyC is the capacitanceThe capacitors behavior is defined in terms of reactance. The reactance of a capacitor is the ratio of the voltage to the current. The equation relating the reactance to the capacitance is given in equation (12).is the total input impedance of the capacitor(13)where is the input impedance, as the input is taken from the ground to the output terminals of the function generator.(14)Using equation 12But from the spec ification sheet, f must be less than 100Hz.f 100(15)Calculation ofFor the input coupling capacitor Calculation ofFor the output coupling capacitor Where is andCalculation ofFor the bypass capacitor where (16)ButAs stores does not have these calculated capacitor values, the following standard capacitors were usedCapacitorCalculated Value/Standard Value/0.175100.2341014.985100Table 3 Standard values chosen for capacitorsCIRCUIT CALCULATIONSThe following circuit calculations involve the standard component values and are based on the circuit shown in figure 3. These circuit calculations show the theoretical value of the quiescent currents and voltages. Theoretical values occur due to the circuit being under ideal conditions. The voltage gain of this circuit will be calculated as well as the maximum symmetrical output voltage across the transistor. The calculations are as followswhich flows through the collector resistorUsing the potential divider rule(17)The voltage drop across is the s ame as, as both resistors are in parallel.was found on the data sheet as specified previously as .(18)(19)Under ideal conditions, it is assumed that is negligible when compared with as stated previously.(20)for small changes in(21)where is 130(22)(23)(24)(25)(26)(27)(28)(29)(30)(31)(32)since negligible current flows into the base terminalFigure 6 was used as a reference point to calculate the voltage gain and input impedance of the circuit.Equation (10) was used to calculate the voltage gain of the circuitThe maximum output voltage swing without clipping is calculated as using the following equation(33)The following equation is used to calculate the input impedance of the circuit(34)For simplification in calculation,(35)(36)COMPUTER SIMULATIONDC AnalysisThis design was tested theoretically in the previous section and must now be tested on a computer simulation curriculum. The simulation program used to simulate this circuit is Multisim 7. This software creates the circuit design and simulates the circuit practically and not theoretically. All quiescent voltages and currents were refractory as well as the cut-off frequency, voltage gain and maximum symmetrical output voltage. The graph analyzer tool on the Multisim program was used to display these graphs. The following figure illustrates the simulation done for the DC AnalysisVoltage GainThe following circuit was used to espouse the voltage gain of the BJT AmplifierFigure 7 Showing circuit used for DC AnalysisThe voltage gain of the simulated circuit is the ratio of the maximum output voltage to the maximum input voltage. The voltage gain of the circuit is given by the equationThe following figure shows the aspects used on the ambit to obtain an input and output waveformThe maximum output and input signals was read off from the graph above using the Interpolator Line. Using the above equation, the voltage gain of the circuit was determined as followsThe following figure illustrates the bode plot obtaine d from the simulationThis graph was used to find the gain of the circuit using the following equationFrom the above equation, the gain, in decibels is related to the above equation.Using the Interpolator Line, the gain, was determined to be 34.34. Hence the voltage gain was calculated as followsThe above calculation indicates that the design circuit would produce a satisfactory gain of approximately 50.Therefore the graph in figure 10 confirms that the design would produce a voltage gain of approximately 50.Cut-off FrequencyThe following bode plot was used to determine the lower cut-off frequencyThe figure above was used to determine the lower-cut off frequency of the circuit. The lower-cut off frequency is the frequency at which the gain of the circuit decreases by 3 decibels. The Interpolator Line was placed at a gain of 30.861decibels, as this is the gain which corresponds to the lower-cut off frequency. The lower-cut off frequency was determined to be approximately . This lower cut-off frequency is much less than 100Hz and and then it meets the required specification.The following bode plot was used to determine the upper cut-off frequencyThe figure above was used to determine the upper -cut off frequency of the circuit. The Interpolator Line was placed at a gain of 30.816 decibels, as this is the gain which corresponds to the upper-cut off frequency. The upper-cut off frequency was determined to be approximately .Lab ResultsThe final test done on the designed circuit was done in the year 1 laboratory. The actual resistances and capacitances of the standard components used were mensural using the LCR meter. The following table illustrates the measured resistancesResistorStandard Resistance/ calculated Resistance/Tolerance/%Lower Tolerance/ upper Tolerance/6.86.763856.467.141.51.50351.4251.57510099.81595cv130129.955123.5136.52423.529522.825.2100 k99.233595105TABLE 6 Measured resistances AND THEIR TOLERANCE trampThe following table illustrates the measure d capacitancesCapacitorStandard Value/Measured Value/TABLE 8 Showing Measured capacitances used in the laboratoryThe BJT Amplifier was then built on the solder less breadboard. The DC LQD-421 dual power supply and the function generator were used to supply the input voltages. The following diagram shows the circuit builtAs seen above, the capacitors were committed across their respective resistors and the Feedback FG 601 function generator was connected to the input capacitor. Before measuring the quiescent points of the circuit, tests had to be done to ensure that the required gain of 50 was achieved.This was done by connecting a Tektronix 2205 dual darkness oscilloscope to the AC bias circuit. The channel 1 lead was connected to the input signal via the input capacitor and the channel 2 lead was connected across the output signal via the load.The settings on the Feedback FG 601 function generator were set to produce a 1kHz sine wave with an amplitude of . The channels on the Tekt ronix 2205 dual trace oscilloscope were grounded and the signals centered. The DC LQD-421 dual power supply was turned on and set to 15V and the Feedback FG 601 function generator and the Tektronix 2205 dual trace oscilloscope also turned on. The channels were switched to AC and the input and output sine waves appeared on the screen. To obtain a clear waveform on the screen, the following settings were used on the Tektronix 2205 dual trace oscilloscopeThe Volts/Div setting was set atThe channel 1 setting was set atThe channel 2 setting was set atThe two waveforms were then used to determine the voltage gain of the BJT Amplifier. Using the following equationThe upper and lower cut-off frequencies were found for the BJT Amplifier. This was done by varying the frequency on the Feedback FG 601 function generator and plotting a graph of Gain vs Frequency. The range used for the Feedback FG 601 function generator was10Hz 100Hz for lower cut-off frequencyThe following table illustrates th e frequency and gain for lower cut-off frequencyFrequency/HzInput/mVOutput/VGain100.01550200.01550300.01550400.01550500.01550600.01550700.014.848800.014.646900.014.2421000.012.626Table4 showing frequencies used to get varying gainThe lower cut-off gain was calculated from the equationThe original setting on the Feedback FG 601 function generator was set so that the maximum symmetrical swing of the BJT Amplifier could be determined using the Tektronix 2205 dual trace oscilloscope. This was done by increasing the frequency of the Feedback FG 601 function generator until clipping of the output waveform was seen. It was noted that the BJT Amplifier did not have maximum symmetrical swing as the negative blooming of the waveform started clipping after the positive peak waveform. Hence, the positive swing and negative swing was calculated as shown in the followingPositive swingNegative swingThe maximum voltage swing was found to beThe original setting on the Feedback FG 601 function gener ator was set as the effect of removing the bypass capacitor was explored.The equipment was foremost turned off for safety purposes and the bypass capacitor removed. The equipments was then turned on and the settings on the Tektronix 2205 dual trace oscilloscope configured to obtain a measurable waveform. The gain was then calculated using equation ().Hence, it can be stated that the gain of the BJT Amplifier decreased considerably when the bypass capacitor was removed.The maximum symmetrical swing for the amplifier was then tested. This was done as followsThe frequency of the Feedback FG 601 function generator was increased until clipping occurred. It was seen that maximum symmetrical swing was not observed as the negative peak of the waveform started clipping before the positive waveform. Hence the swing was calculated for both the positive waveform and the negative waveform. The calculations are as followsPositive swingNegative swingThe maximum voltage swing was found to beThe Te ktronix 2205 dual trace oscilloscope was disconnected from the circuit and the Fluke 177 Multi-meter was used to measure the quiescent points of the circuit. The probes were placed across the different points and their readings were recorded. The Fluke 177 Multi-meter was set at when measuring currents and at DC voltage when measuring voltages. The DC voltage setting was used as the AC would not accede measurable readings.To measure the quiescent currents, wires were stripped and attached to the leads of the probes. The circuit had to be broken at the quiescent current point being measured. thusly the wire attached to the probe was inserted into the solder less breadboard so that the wire was in series with the component removed. The removed component was placed where it was originally to ensure continuity in the circuit. This was repeated at all quiescent points. The following table illustrates the measured currentsThe following table illustrates the measured currentsCurrentValue /TABLE 5 AC ANALYSIS OF CIRCUITThe following table illustrates the measured voltagesVoltageValue/0.676TABLE 4 AC ANALYSISQuiescent ValuesCurrents I / mAVoltagesV / VCalculatedSimulatedMeasuredCurrentI / mAVoltageV/VCurrentI / mAVoltageV/VCurrentI / mAVoltageV/V0.650.6630.676DISCUSSIONThe BJT Amplifier was built using the common emitter configuration. It was H-type biased to increase the stability in the transistor. Also, as is affected with temperature a change, the H-type biasing configuration ensures that changes in is minimal. Also, the resistors used were made from carbon. This means that the resistors are not required to have high temperature stability. Without a biasing arrangement, the BJT amplifier will not turn on because it will not be in the operating region according to the specifications (Boylestad, Nashelsky, 1987).The differences in values for quiescent points obtained can be explained because the calculated and simulated values were found under ideal conditions. The component values used alter from the standard values